This n-bit digital signal is passed to a digital decimation filter and to the feed-back DAC. The decimation filter removes the out-of-band quantization noise, thereby converting the high rate low resolution signal to a high resolution low rate signal. The feed-back DAC performs the inverse function of the ADC quantizer and converts the n-bit digital code to an analog voltage or current, closing the Sigma-Delta loop.
Several different types of analog Sigma-Delta Modulators exist, varying in for example the way the loop filter is functioning e. The coarse quantization results in a large amount of quantization noise which is pushed out of band by the loop filter. A 1-bit quantizer is easier to build than a 5-bit quantizer, requires less area and power, and is intrinsically linear, but has the disadvantage that less efficient noise shaping can be realized and that a higher oversampling ratio is required to compensate for this.
The final Sigma-Delta output, i. Sometimes only the part before the decimation filter is considered in discussions about Sigma-Delta Modulators. The sampling rate of the signal is increased during this process in order to generate additional spectral space for the quantization noise. The resulting signal is passed to the actual SDM loop. This loop is very similar to the one in Fig. The ADC and DAC combination is replaced by a single quantizer which takes the many-bit loop-filter output and generates a lower-bit word. Since everything is operating in the digital domain no DAC is required and the m-bit word can directly be used as feed-back value.
The noise-shaped m-bit signal is the final Sigma-Delta output. In the case of audio encoding for Super Audio CD the 1-bit output is the final goal of the processing and is directly recorded on disc. In the digital domain the input signal to the DAC is shaped, such that the quantization noise of the DAC is moved to high frequencies. In the analog domain a passive low-pass filter removes the quantization noise, resulting in a clean baseband signal.
Because the noise-shaping feed-back signal is not crossing the analog-digital boundary, the name Sigma-Delta DAC is confusing and misleading. The noise-shaped m-bit signal is passed to the mbit DAC which converts the digital signal to the analog domain. Finally the analog signal is filtered to remove the out-of-band quantization noise.
In the case of an analog filter the combination of a quantizing ADC and a DAC is required for closing the noise-shaping loop and a decimation filter is present at the output. In the case of a digital filter no analog-digital domain boundary has to be crossed and only a digital quantizer is required, but at the input an upsample filter is present.
When studying the noise-shaping properties of an SDM from a high-level perspective these analog-digital differences can be safely ignored and a generic model of the Sigma-Delta noise-shaping loop can be used instead. This generic model, consisting of a loop filter and a quantizer, is depicted in Fig. The loop filter has two inputs, one for the input signal and one for the quantizer feed-back signal, where the transfer function for the two inputs can be complete independent in theory.
In practice large parts of the loop-filter hardware will be shared between the two inputs. A practical loop-filter realization will consist of addition points, integrator sections, feed-forward coefficients bi and feed-back coefficients ai as shown in Fig. In this structure the number of integrator sections sets the filter order, e. The exact filter transfer is realized by the coefficients.
With proper choice of bi and ai the complexity of the filter structure can be reduced, e. This optimized structure can be redrawn to give a 1-input loop filter where the first subtraction is shifted outside the filter, as depicted in Fig. As an alternative it is possible make all bi equal to zero except for bN and realize the noise-shaping transfer using only ai. This structure is referred to as a feed-back SDM and is shown in Fig. The two structures can be made to behave identical in terms of noise shaping but will realize a different signal transfer.
In both structures the quantizer can have any number of quantization levels. In practice values between 1-bit 2 levels and 5-bit 32 levels are used. This structure is commonly referred to as multi-stage noise shaping MASH structure. In an MASH structure the quantization error of a first modulator is converted by a second converter, as depicted in Fig. By proper weighing the two results in the digital domain with filters H 1 and H 2 the quantization noise of the first modulator is exactly canceled Fig.
The subtraction point of signal and feed-back has been shifted outside the loop filter Fig.
- HOW TO LOSE BABY WEIGHT: “YES” TO YOUR FAVORITE DRESS (The Easiest Weight Loss Book 1).
- Account Options;
- What is Kobo Super Points??
In this fashion an nth order noise shaping result can be obtained by using only first order converters. The disadvantage compared to a single-loop SDM is the inability to produce a 1-bit output. Closely related to the SDM is the noise shaper structure. In a noise shaper no filter is present in the signal path and only the quantization error is shaped. This is realized by inserting a filter in the feed-back path which operates on the difference between the quantizer input and quantizer output, as depicted in Fig.
With a proper choice of the filter the same noise shaping can be realized as with an SDM. Unique for the noise shaper is that only the error signal is shaped and that the input signal is not filtered. Because of this special property the noise shaper can also be used on non-oversampled signals to perform in-band noise shaping. This technique is, for example, used to perform perceptually shaped word-length reduction for audio signals, where bit pulse-code modulated PCM signals are reduced to bit signals with a higher SNR in the most critical frequency bands at the cost of an increase of noise in other frequency regions.
In this figure x k represents the discretetime input signal, d k the difference between the input and the feed-back signal the instantaneous error signal , H z is the loop filter, w k the output of the loop filter the frequency weighted error signal , and y k is the output signal. If it is assumed that the quantization error is not correlated with the input signal, the quantizer can be modeled as a linear gain g and an additive independent noise source n k which adds quantization noise.
The resulting linear SDM model is depicted in Fig. By replacing e k in Eq. The noise transfer function NTF describes how the quantization noise, which is introduced by the quantization operation, is transferred to the output of the modulator. The sampling rate is 2. With H z low-pass it can be appreciated that the STF will be close to unity for low-frequencies and that the input signal will be accurately captured.
Look-Ahead Based Sigma-Delta Modulation
The transfer characteristic of a typical fifth order loop filter is plotted in Fig. In this example the loop filter is designed according to a Butterworth specification for a corner frequency of kHz when the sampling rate is 2. Resonators linear feed-back within the loop filter at 12 and 20 kHz have been added for increasing the SNR [7, 50].
As expected, the STF equals unity for low frequencies for both types. Around the corner frequency of the feed-forward filter a gain of approximately 7 dB is realized before the filter starts to attenuate the input signal. The feed-back filter realizes a gain of approximately 3 dB at the corner frequency and then falls off strongly. Plotting the NTF accurately is far less trivial. It has to be realized that Eq. Only if signal e k is uncorrelated with the input signal, Eq. In the case of a multi-bit quantizer the quantization error is reasonably white for typical input signals.
If desired, it can be made completely white by adding to the quantizer input a dither signal with triangular probability density TPDF that spans two quantization levels . In the case of a single-bit quantizer the quantization error is strongly correlated with the input signal. Furthermore, since only two quantization levels exist it is not possible to add a TPDF dither signal of large enough amplitude to the quantizer input without overloading the modulator. In the case of a single-bit quantizer a deviation from the predicted NTF is therefore to be expected.
Typical effects caused by the gross non-linearity of the 1-bit quantizer 2. According to this prediction the quantization noise will be rising with dB per decade and from kHz onwards the spectrum will be completely flat. At 12 and 20 kHz a notch in the quantization noise floor should be present. By means of simulations the accuracy of this prediction will be verified. The FFT length used is samples. The spectrum has been power averaged 16 times in order to obtain a smooth curve see Appendix A. In the figure the predicted dB per decade rise of the noise can be clearly identified.
The high frequency part of the spectrum, however, deviates strongly from the prediction, i. In the baseband part of the output odd signal harmonics can be identified, which are not predicted by the linear models STF. The predicted quantization noise spectrum is indicated as a dashed line Fig. The predicted quantization noise spectrum is indicated as a dashed line at 12 and 20 kHz are present. The spectrum shows globally the same noise shaping as in the first example, with superimposed on it a large collection of discrete tones. These so-called idle tones cannot be understood from the linear model, but can clearly be an issue as they are not only present at high frequencies but also in the baseband.
As is clear from the two examples, large differences can exist between the prediction based on the linear model and actual modulator output in the case of a 1-bit quantizer. Since no accurate mathematical models for predicting a modulators response exist, the only reliable solution for obtaining performance figures of a 1-bit SDM is to perform time-domain simulations and analyze these results.
Unfortunately, at the start of a design no realization exists yet and the linearized STF and NTF formulas have to be used for designing the initial loop filter. As a next step, computer simulations will have to be used to verify the response. Depending on the simulation outcome parameters will be iteratively adjusted until the desired result 2. In order to obtain reproducible and comparable results, in this book the iterative approach for designing loop filters is not taken.
Filters are designed using the linear model of a traditional SDM, according to a predetermined criterion, and used as-is. The predetermined criterion will typically be a transfer characteristic according to a Butterworth prototype filter with a specified corner frequency. The actual resulting transfer might be varying as a function of the input signal and the noise-shaping structure used, and can therefore only be compared by keeping the same filter which is designed using one and the same standard approach.
The signal conversion performance can again be divided in two groups, namely performance measures that hold for data converters in general, and SigmaDelta converter specific functional performance. The SDM specific functional performance indicators, discussed in Sect. In order to enable an easy comparison of designs, often a Figure-of-Merit FoM calculation is used. In the FoM several performance indicators are combined into a single number that represents the efficiency of a design. In the case of an SDM this approach is not straightforward, and the topic is therefore discussed separately.
Next to these signal conversion performance metrics, the implementation and resource costs are important quality aspects of a converter. By combining several of these performance indicators into an FoM, the converter performance can be specified with a single value. In both cases the harmonic signal power is compared to the power of the residual noise signal. The residual power can be split in noise and signal distortion components. In an SINAD measurement no differentiation between the two types of signal is made and the complete residual signal is integrated, hence the name Signal-to-Noise-and-Distortion-Ratio.
In an ideal SNR measurement only the noise part of the residual signal is integrated. FFT length is samples, 16 power averages have been performed In practice however, an SNR measurement will typically only ignore the harmonically related signal components.
Passar bra ihop
Non-harmonically related components, i. Only in the case of no distortion the two numbers are equal. In the case of an oversampled converter, e. In this book the band of interest is the baseband part of the output, i. Typical distortion of an SDM consists of odd harmonic components, i. As an example, if the input frequency is chosen as 5 kHz, there will be harmonic components at 15 kHz, 25 kHz, 35 kHz, etc. Since only the baseband 0—20 kHz in most examples is considered for SINAD calculations, only the component at 15 kHz will be taken into account. The SINAD value for this input frequency will therefore be most likely higher than for a slightly lower input frequency which has multiple harmonics in the baseband.
For this frequency the first 19 harmonics fall within the signal band. The input signal which has an amplitude of 0. In this example the SNR equals The difference of 1. Note that it is in general not possible to accurately read the SNR or SINAD value directly from a spectral plot — integration over all frequency bins is required and the spectral density per bin is a function of the number of points of the FFT. The non-signal peak can be harmonically related but this is not required. In oversampled systems not the complete spectrum is taken into account, only the band of interest is considered.
In the case of a digital SDM no artifacts other than those generated by the modulator itself are expected to be present, therefore typically the biggest peak is a harmonic component or the inband rising noise-floor. In the example spectrum of Fig. In oversampled systems only the harmonic power in the band of interest is included in the calculation. The THD value relates to the linearity of a converter, i.
The THD is often a function of the input level. In analog converters large inputs typically cause circuits to saturate or clip and therefore generate distortion. In a digital SDM saturation and clipping can be avoided by using large enough word widths, but a 1-bit SDM will still generate harmonics, especially for large input signals.
Determining the THD accurately can be difficult when the harmonic distortion components are of the same order of magnitude as the random noise components. In order to still get accurate results the technique of coherent averaging can be applied. The result of this process is that random frequency components are suppressed while coherent signal components are not.
Every doubling of the number of averages reduces the random signals by 3 dB, e. Please refer to Appendix A for more details. In the example of Fig. First, there is the time required to design the converter. Second, there is the cost associated with the physical IC realization, i. Third, there is the 20 2 Basics of Sigma-Delta Modulation cost related to the industrial testing of the manufactured device.
Trendings - Free eBook Downloads
Next to these cost factors which are occurring only once, there is a reoccurring cost factor, i. This cost manifests itself as the power consumption of the converter. Both the silicon area and required design time depend on the type and the specifications of the converter, as well as on the experience of the designer. In general it holds that if the performance specification is more difficult to reach, the required design time will be longer and often the circuit will be bigger.
The power consumption of the circuit typically also scales with the area and the performance level. In order to increase the SNR, i. A data converter that uses little power is preferred over a converter that requires a lot of power. A smaller silicon area results in less direct manufacturing cost. However, the industrial testing that is required can add significant cost.
A converter that requires little testing is therefore preferred over a converter that requires a lot of tests. To overcome this problem and make the comparison of different data converters possible, typically a Figure-of-Merit FoM is calculated. In the FoM a single value is used to represent the performance specifications of the converter, typically the power consumption and the signal conversion bandwidth and resolution. Unfortunately, no universally agreed standard exists for calculation of the FoM.
The unit of the FoM of Eq. As a result, a lower value is better. Sometimes the inverse of Eq. In order to reduce the impact of the noise by 3 dB, capacitances need to be doubled. To increase the number of effective bits by one, a 6 dB reduction of the noise is required, which means a factor four increase in capacitance. Since power scales linearly with the amount of capacitance to charge, the power will also increase with a factor four.
Whereas comparison of AD converters by means of a single FoM is common practice, for DA converters it is not a standard approach. One of the main reasons why for DACs the single FoM approach is problematic is the time continuous output signal. When the DAC output signal is switching, i. Deviations from the ideal switching trajectory will add noise and distortion to the output. Depending on the type of application, these glitches could be problematic but not necessarily. In some applications only the DC transfer is important whereas in other applications the signal quality over a large bandwidth is important.
Sometimes a signal overshoot at a transition is allowed, sometimes a smooth settling curve without overshoot is required. However, avoiding time domain glitches will typically cost power, and therefore the power efficiency of a converter can vary greatly depending on the time domain behavior. The output signal of a DAC is not only an information signal, but at the same time a power signal. If a larger output swing is required from the DAC, more power will have to be spent in the generation of this signal.
A higher power consumption is thus not necessary equal to less performance, but could also indicate more performance. However, since part of the power consumption is, by definition, required to drive the load, straightforward application of Eq. As a result, only signals below a certain maximum input level can be converted without causing the modulator to become unstable. This level for which the modulator becomes unstable is a function of the loop-filter order and loop-filter cutoff frequency .
Roermund, Arthur H. M. van
If the loop filter is fixed, the maximum input amplitude can be determined by means of simulations. The procedure consists of repeatedly applying a signal with a constant amplitude to the converter. The converter is run until instability is detected or until a maximum amount of time has passed. If no instability is detected within the predetermined amount of time, it is concluded that the converter is stable for the applied signal level and the signal amplitude can be increased. If instability was detected the maximum level that can be applied has been found.
Instead of trying to detect instability while the converter is running, it is also possible to always run the converter for the maximum amount of time, and afterwards determine if the converter is still stable. With the second approach it is easier to quantify the result and this is therefore the approach taken in this work. The easiest procedure is to test the output bitstream.
Alternatively, the SNR and the frequency of the output signal can be measured and near instability can be detected by testing if the obtained values differ strongly from the expected values. This is the approach taken in this work. Instead of measuring the maximum input signal that can be handled by the modulator, it is possible to measure how aggressive the loop filter can be made before instability occurs for a given input signal. A practical test signal is a sine wave with the maximum desired amplitude.
The same procedure for detecting instability as explained above can be used, i. Aggressiveness of a loop filter can be increased by increasing the order of the filter or by increasing the corner frequency of the filter. Changing the filter order has a very large impact on the stability of the modulator and is therefore not practical. The loop-filter corner frequency on the other hand can be adjusted in very fine steps and is therefore more appropriate for determining stability. In the case of a traditional SDM the stability can be determined for a given configuration, but cannot be changed or influenced in any way.
For the look-ahead modulator structures in this book the situation is slightly different, and as a function of 2. It is considered beneficial to have a stable modulator to enable a large input range and high SNR. We distinguish those components between limit cycles and idle tones. A limit cycle is a sequence of P output symbols, which repeats itself indefinitely. As a result the output spectrum contains only a finite number of frequency components. An idle tone is a discrete peak in the frequency spectrum of the output of an SDM, which is superposed on a background of shaped quantization noise.
Hence, there is no unique series of P symbols which repeats itself .
The two situations are illustrated in Fig. When limit cycles are present in the output signal of an SDM, typically no signal content except DC is present at the input, although in theory also a generic repetitive input signal, e. In practice, limit cycles only show up when the input signal is removed and a small DC offset remains. Depending on the DC level, which determines the frequency content of the limit cycle, the limit cycle can contain in-band components and cause problems or only contain harmless high frequency components.
- Maybe The Moon.
- Taken By The Clan (Paranormal Erotica)?
- MOM’S NEW TESTAMENT BIBLE STORIES : Heroes and Scoundrels.
- Hamilton Cashew and the Story Weavers.
- Evaluation of Common Stock?
- Table of Contents.
- Miriams Schooling and Other Papers.
- Look-Ahead Based Sigma-Delta Modulation by Roermund, Erwin Janssen; Arthur Van?
- The Diva, the Dragon and the Devils Right Hand;
Idle tones on the other hand typically occur when an input signal is present at the input of an SDM. Harmless high frequency idle tones are often present in the output spectrum of an SDM, but depending on the input signal the frequency of an idle tone can also be in-band and cause significant degradation of the output signal quality. Higher order modulators typically show less idle tones than low order modulators.
By dithering a modulator mildly the power in idle tones can be reduced, but to fully avoid all possible idle tones a very significant amount of dither is required, penalizing the stable input range of the modulator severely. Therefore, a modulator that does not introduce idle tones or limit cycles is preferred. This effect is fundamentally present for 1-bit converters. Ideal behavior, expected behavior, and actual measured behavior are indicated 1. Since the output signal power equals the input signal power, a varying amount of the output power is available for quantization noise, and it is clear that noise modulation is required to have a functional system.
Therefore noise modulation in its basic form is not an issue according to the author. The problem however is located in the fact that the amount of baseband quantization noise may vary with the input signal power. In the case where the converter is used in an audio application, and the background noise the quantization noise grows stronger and weaker with changes in the music level, the effect has proven to be audible in critical listening situations.
According to [13, 36, 52] the variation in background quantization noise should be less than 1 dB in order to be inaudible. For high quality audio applications the objective is to have a constant background noise which results in predictable signal quality. Therefore noise modulation should be minimized or avoided if possible. In the special case where the converter is used in a test or measurement setup and the only concern is to maximize the SNR for every input AD or output level DD for DA , noise modulation can be used to an advantage. Since the total output power for a 1-bit converter is constant, the noise power increases when the signal power reduces.
If the increase in noise power would be evenly distributed over all frequencies, the SNR in the baseband would decrease relatively more when the input power is reduced. In practice however, the amount of baseband quantization noise reduces when the input signal becomes smaller, and therefore the SNR will be higher than expected. This SNR behavior as a function of the input amplitude is depicted in Fig.
The SDM used in this experiment was a fifth order with two resonators. The difference between the ideal and expected curve is approximately 0. The explanation of this phenomenon can be found by studying the high frequency noise spectrum. When low amplitude inputs are applied, the SDM will start to generate high frequency idle tones, which take most of the noise power. When the input amplitude is increased, the idle tones cannot exist anymore and the low frequency noise-floor will increase .
Testing for noise modulation is typically done by applying several DC levels as input signal, and for each DC level low-pass filtering the output and calculating the second order moment M2 of the error. The advantage of this method is that it will measure exactly how much noise is generated for each input level.
As an alternative it is possible to sweep the input level of a sine wave and to calculate the SINAD for each level. This method results in less precise results, since the sine wave passes through a range of intermediate levels, causing an average noise level. Although the amount of information obtained by performing a DC sweep is larger, the result from the AC sweep is more representative for specifying audio encoding quality. Both methods are used in this book. For example, when a modulator is close to instability it can have difficulty to accurately follow transients in the input signal.
When this happens, temporarily relatively large encoding errors are introduced until the modulator has recovered. Since the occurrence of this effect depends on the state of the system, it is difficult to detect or measure the impact using steady-state signals. By performing an analysis on dynamically changing signals, using a transient signal analysis method, it is possible to detect such encoding errors if they are not masked by other encoding imperfections. However, the measurement of performance in the time domain is not common practice.
Therefore, a transient signal analysis method is introduced in Chap. All blocks generate noise and contribute to the final SNR. The loop filter determines the order and amount of quantization noise shaping. A higher order filter will require more components, more power, and more silicon area. Since the first integrator stage of the filter typically consumes the most power, the impact of increasing the filter order is often limited. Next, there is the quantizer. If more quantization levels are required, the complexity of this block will increase.
Most commercial designs do not have more than 5 quantization bits, because the design efficiency will go down strongly for more bits. This efficiency reduction is caused by the increase of detection levels and at the same time the more stringent requirement on accuracy and noise performance of the thresholds. Thus, an increase in complexity of the quantizer also enforces an increase in the complexity of the DAC. Another factor that influences the cost of the building blocks is the oversampling ratio OSR of the converter.
An increase of the OSR will require the quantizer to make its decisions faster and the DAC to produce its output faster, i. In most situations this will result in an increase in power consumption of those blocks. Furthermore, the output data rate of the converter also scales with the OSR, and the complexity of the subsequent digital decimation stages will also be affected. However, a higher OSR is beneficial for the noise-shaping efficiency, and might allow for a lower order filter or less quantization levels without reducing the SNR of the converter. In the case of a digital-to-digital SDM the implementation costs are different.
All functions, i. The loop filter is by far the most difficult block and requires significant hardware resources. The filter consists of integrators, which are digitally realized by adders with feed-back around a delay element, and filter coefficients.
The coefficients are realized by digital multipliers or combinations of shift and add. Because typically a large dynamic range is required from the modulator, a very wide data-path is required. On the other hand, the quantizer function often involves not more than a few comparators. In the case of a 1-bit SDM, it can even be implemented without any comparison operations, and selection of the sign bit is all that is required. Also in the case of a DD converter it is the OSR of the converter that determines the clock frequency at which all the operations are performed.
For most digital realizations the power consumption scales with the clock frequency. Initially this scaling is linear, but if the frequency is increased towards the limit of the technology, the scaling is more than linear. Because an SDM is a feed-back structure, pipelining of operations is not possible and all the results should be ready within a single clock cycle.
The computation of the coefficient multiplication is the most challenging operation, but by selecting appropriate coefficients the computations can often be simplified. Without going into the details of the look-ahead concept see Chap. In order to realize a look-ahead modulator, a multitude of loop filters is required. For each loop filter an alternative quantizer is present. Finally, there is a control structure that takes care of the selection of the output symbol.
Because of the multiple loop filters and quantizers, the power consumption of a look-ahead modulator will be a multiple of that of a normal modulator. On top of the increased hardware complexity, there is also an increased algorithmic complexity associated with the look-ahead concept.
Depending on the type of SDM, i. It is the view of the author that this is not correct, since the reconstruction filter is essential for the operation of the modulator, and can consume a considerable amount of power. Nevertheless, in practice the FoM is mostly calculated with a slightly modified version of Eq. In this equation the conversion bandwidth is thus limited to the smallest of the ERBW and the signal conversion bandwidth.
Besides this change, the FoM equation is identical to the generic one and no SDM specific features are included. Most stand-alone converters are software based instead of dedicated hardware solutions, and therefore the power measure is not practical. A convenient metric in this case is the amount of operations per second required for the implementation to run real-time. Alternatively, the absolute amount of time can be measured that is required to process a fixed amount of signal.
If the same test conditions are used repeatedly, i. This is not a problem if the designs under comparison are designed to deliver equal performance, i. In this chapter an abstract model of a noise-shaping quantizer is derived. A noise-shaping quantizer is a more general description of a sigma-delta modulator, consisting of one or more cost functions and a selection function.
The cost function is an indication of the quality of a signal or an encoding solution, and the selection function determines the output symbol. In the case of a normal sigma-delta modulator the cost function is implemented by the loop-filter and the selection function by the quantizer. This generalization of the sigma-delta modulator structure will enable to addition of look-ahead functionality in the next chapter.
The generic noise-shaping quantizer model from chapter four is modified to support look-ahead, and a hypothetical sigma-delta modulator with look-ahead capability is derived. From here the main principles of look-ahead are explored, including linear modeling of a look-ahead modulator, and an overview of expected benefits and disadvantages of a look-ahead sigma-delta modulator. Although only with an infinite amount of look-ahead the global optimal encoding solution can be found, it is concluded that already with a limited amount of look-ahead an improvement in the signal conversion performance can be obtained.
The benefits of look-ahead, primarily an increase of the stability and a reduction of the distortion, are the biggest in the case of a 1-bit converter, since here the quantizer is severely non-linear. Therefore, in the remaining chapters the focus will be primarily on 1-bit converters. The operation of the full look-ahead algorithm, an algorithm that can be found in open literate and that performs an exhaustive search for the best solution within the look-ahead depth, is reviewed. With these insights the feasibility of an analog-to-digital converter with look-ahead is investigated, and it is concluded that the feasibility is low.
It is found that in the case of a digital-to-digital converter, in principle, look-ahead can be implemented without major difficulties, but that the traditional full look-ahead approach is not computationally efficient. In this chapter the possibilities for reducing the computational load of look-ahead digital-to-digital conversion are explored.
An analysis is made of the opportunities to reduce the number of computations required to perform full look-ahead. For small look-ahead depth it is possible to reduce the number of calculations, but for large look-ahead depths the savings that can be realized are limited, and ultimately the number of computations that are required per output symbol doubles with an increase of the look-ahead depth by one. As an alternative to full look-ahead, the possibilities for performing pruned look-ahead are explored.
In this case not the full solution space is explored, but based on heuristics a small subset of all the solutions are investigated. This approach can realize a large reduction of the computational load, while the impact on the signal conversion performance can be made negligible small. Because of the potentially large advantage over full look-ahead, several ideas for realizing pruned look-ahead modulators are presented, that are explored in detail in the next chapters.
Chapter seven presents a full analysis of the Trellis sigma-delta modulation algorithm. This algorithm is the first pruned look-ahead sigma-delta modulation algorithm found in literature. It is a derivative of the full look-ahead algorithm and uses concepts from Trellis Viterbi decoding, hence the name. In the Trellis sigma-delta modulation algorithm, at all times, a total number of 2 N potential solutions paths are investigated, of which the most recent N symbols are different for all the solutions. More specifically, the characteristics of the NTF, which include pole and zero values of the NTF, may differ according to a design specification of the sigma-delta modulation unit Furthermore, if the pole and zero values of the NTF are adjusted, an oscillation degree of the sigma-delta modulation unit may be adjusted.
Thus, the threshold may be experimentally optimized and designed in terms of the design specification of the sigma-delta modulation unit If the level of the input audio signal Sin for a frequency band is equal to or greater than the threshold, the stability determination unit may determine the input audio signal Sin in the frequency band to be unstable. More specifically, the stability determination unit may generate a signal level of the stability determination signal Sm as a first level if the level of the input audio signal Sin is equal to or greater than the threshold, and may generate the signal level of the stability determination signal Sm as a second level if the level of the input audio signal Sin is less than the threshold.
The sigma-delta modulation unit performs sigma-delta modulation SDM on the input audio signal Sin according to the stability determination signal Sm transmitted from the stability determination unit and outputs a first modulation signal Sout 1. Accordingly, the first modulation signal Sout 1 is generated after being pulse modulated corresponding to the input audio signal Sin. In this regard, the sigma-delta modulation unit may have an order that may differ according to the number of integrators included in the sigma-delta modulation unit The sigma-delta modulation unit may have an order that varies according to the first modulation signal Sout 1 transmitted from the stability determination unit The audio signal processing apparatus of the present exemplary embodiment divides the frequency band of the input audio signal Sin into at least one sub-frequency band, and separately determines stability of the input audio signal Sin for the at least one sub-frequency band, thereby precisely determining stability of the input audio signal Sin.
Accordingly, the SNR for each frequency band may be enhanced as much as possible while the stability of the sigma-delta modulation unit is maintained. A stability determination unit and a sigma-delta modulation unit included in the audio signal processing apparatus of FIG. Thus, redundant descriptions will not be repeated here.
The delay unit may transmit the input audio signal Sin, and compensate for a time taken to determine stability of the input audio signal Sin in the stability determination unit Accordingly, the delay unit outputs the input audio signal Sin for which the time is compensated, to the sigma-delta modulation unit More specifically, if it takes a time t 1 to receive the input audio signal Sin and generate the stability determination signal Sm in the stability determination unit , the delay unit may delay the input audio signal Sin by the time t 1 , and transmit the input audio signal Sin delayed by the time t 1 to the sigma-delta modulation unit The stability determination unit may include a detecting unit and an adjusting unit The detecting unit divides a frequency band of the input audio signal Sin into at least one sub-frequency band, and compares a level of the input audio signal Sin for each sub-frequency band with a corresponding threshold.
That is, the detecting unit may perform N comparison operations if the frequency band of the input audio signal Sin is divided into N sub-frequency bands. The adjusting unit determines the stability of the input audio signal Sin according to the comparison result of the detecting unit and generates the stability determination signal Sm corresponding to the determination of stability. The sigma-delta modulation unit may include a loop filter and a quantization unit The loop filter includes at least one integrator not shown , and integrates and outputs the input audio signal Sin.
The loop filter performs noise shaping on noise included in the input audio signal Sin to push the noise to an outband of a frequency band according to a NTF. The quantization unit receives a signal output from the loop filter , quantizes the received signal, and generates the first modulation signal Sout 1 in a pulse signal form. The sigma-delta modulation unit may further include the feedback loop and a summing unit The feedback loop feeds back the first modulation signal Sout 1 and outputs a feedback signal Sout 2.
The summing unit subtracts the first feedback signal Sout 2 from the input audio signal Sin and outputs an adjusted input audio signal Sin 2 to the loop filter If the audio signal processing apparatus includes the delay unit , the summing unit may subtract the first feedback signal Sout 2 from a delayed input audio signal Sin 1 and output the subtracted signal to the loop filter If the sigma-delta modulation unit includes the feedback loop and the summing unit , the sigma-delta modulation unit may adjust at least one of a gain and a phase of the input audio signal Sin or Sin 1 of the sigma-delta modulation unit in view of a gain and a phase of the output signal of the sigma-delta modulation unit Accordingly, the sigma-delta modulation unit may perform precise gain control in accordance with a target gain or a regular maximum output of the audio signal processing apparatus If sigma-delta modulation is performed on an input audio signal having a predetermined level in the low frequency band, an intensity of oscillation rapidly increases over time.
If sigma-delta modulation is performed on an input audio signal having a predetermined level in the high frequency band, oscillation proceeds at regular amplitude without a rapid increase. Referring to FIGS. More specifically, in FIG. Therefore, input audio signals having the same signal level show that an intensity of oscillation for each frequency band differs, and amplitude of oscillation further increases in a low frequency region.
The audio signal processing apparatuses and according to exemplary embodiments described above may set a threshold differently according to the sub-frequency bands when determining stability of the input audio signal Sin. More specifically, the threshold may be set in proportion to frequency values of sub-frequency bands. For example, first through Nth thresholds corresponding to first through Nth sub-frequency bands, respectively, have different values.
The higher the frequency values of the sub-frequency bands, the higher the corresponding thresholds, and thus the first threshold may have a smallest value, and the Nth threshold may have a greatest value. An example is illustrated in FIG. In FIG. The first through third sub-frequency bands may have a same length or different lengths in the X axis. For example, a first threshold Th 1 is set for the first sub-frequency band having 0 through f 1 frequency values, a second threshold Th 2 is set for the second sub-frequency band having f 1 through f 2 frequency values, and a third threshold Th 3 is set for the third sub-frequency band having f 2 through f 3 frequency values.
Thus, if a signal level of the input audio signal in the first frequency band is equal to or greater than the first threshold Th 1 , the input audio signal in the first frequency band may be determined as an unstable signal. On the other hand, if the signal level of the input audio signal in the third frequency band is equal to or greater than the third threshold Th 3 , the input audio signal in the third frequency band may be determined as an unstable signal.
The stability determination unit of FIG. A detecting unit and an adjusting unit may correspond to the detecting unit and the adjusting unit of FIG. Thus, redundant descriptions thereof will not be repeated here. The signal level detecting unit divides a frequency band of the input audio signal Sin into a plurality of sub-frequency bands, and compares the input audio signal Sin for each sub-frequency band with a threshold corresponding to the frequency band for a period. More specifically, the signal level detecting unit may include first through Nth level detecting units , , , and that perform a determination operation for respective sub-frequency bands.
For example, the first level detecting unit receives the input audio signal Sin and determines whether a level of the input audio signal Sin in a first sub-frequency band is equal to or greater than a first threshold. Such a determination may be performed for a period T 1. The counter unit counts results of determination performed by the signal level detecting unit over the period T 1. More specifically, the counter unit may include first through Nth section counters , , , and that perform counting operations for respective sub-frequency bands.
For example, the first section counter may receive the determination result of the first level detecting unit over the period T 1 , and count the number of times the level of the input audio signal in the first sub-frequency band is equal to or greater than the first threshold. The adjusting unit determines stability of the input audio signal Sin according to the counting number output by the counter unit In this regard, a reference counting number used to determine the stability of the input audio signal Sin may be set differently according to a product specification such as operation reliabilities of the audio signal processing apparatus.
The adjusting unit may generate the stability determination signal Sm having a first signal level if the input audio signal Sin is determined to be unstable, and may generate the stability determination signal Sm having a second signal level if the input audio signal Sin is determined to be stable. More specifically, the adjusting unit may determine the stability of the input audio signal Sin for each sub-frequency band, and output the stability determination signal Sm as a first signal level if the adjusting unit determines the input audio signal Sin to be unstable at any one of sub-frequency bands.
The adjusting unit may determine the stability of the input audio signal Sin for each sub-frequency band, and output the stability determination signal Sm as the first signal level only when the adjusting unit determines the input audio signal Sin to be unstable in all of the whole sub-frequency bands. Alternatively, the adjusting unit may determine the stability of the input audio signal Sin for each sub-frequency band, and output the stability determination signal Sm as the first signal level if the adjusting unit determines the input audio signal Sin to be unstable in one or more sub-frequency bands corresponding to low frequencies.
The frequency converting unit converts the input audio signal Sin into a frequency band signal. More specifically, the frequency converting unit may perform fast Fourier transformation FFT on the input audio signal Sin. More specifically, the frequency converting unit converts a number of designated samples into frames and performs FFT on the input audio signal Sin for each frame. The frequency converting unit may transmit frequency spectrum information generated by performing the FFT to the level detecting unit The frequency spectrum information is information regarding a level of the input audio signal Sin for each frequency, and thus if the input audio signal Sin is converted into the frequency band signal, the level of the input audio signal Sin for each frequency may be recognized.
The level detecting unit compares the level of the input audio signal Sin for each sub-frequency band with a corresponding threshold for the sub-frequency band by using the frequency band signal converted from the input audio signal Sin by the frequency converting unit The adjusting unit receives a comparison result for each sub-frequency band from the level detecting unit , determines stability of the input audio signal Sin, and generates the stability determination signal Sm having a first or second level. In this regard, the operation of the adjusting unit is the same as that of the adjusting unit of FIG.
While a first and second level are described, one of ordinary skill in the art will appreciate that more than two levels may be used. A stability determining unit and a sigma-delta modulation unit of the audio signal processing apparatus may correspond to the stability determining units and , and the sigma-delta modulation units and of the audio signal processing apparatuses and of FIGS. A delay unit of the audio signal processing apparatus may correspond to the delay unit of FIG. The driving signal generating unit receives the first modulation signal Sout 1 , and generates at least one driving signal CON for controlling a switching amplifying operation according to the input audio signal Sin and the first modulation signal Sout 1.
In this regard, the switching amplifying operation is performed by using at least one switching device not shown included in the power switching amplifier The driving signal CON is a switching control signal used to control the switching device not shown to be turned on or off.
The driving signal CON is transmitted to the power switching amplifier The power switching amplifier performs the switching amplifying operation and includes at least one switching device not shown that turns on or off in response to the driving signal CON. The power switching amplifier outputs an amplified audio signal Sout corresponding to the input audio signal Sin by using the switching device not shown.
In this regard, the amplifying audio signal Sout may be a signal obtained by amplifying the amplitude of the first modulation signal Sout 1. For example, the power switching amplifier may amplify the first modulation signal Sout 1 in such a way that the audio signal Sin input to the audio signal processing apparatus may be output in accordance with a regular maximum output. The switching device not shown included in the power switching amplifier may include at least one of a gallium nitride GaN transistor, a gallium arsenide GaAs transistor, and a silicon carbide SiC transistor.
The gallium nitride GaN transistor and the gallium arsenide GaAs transistor have a short propagation delay and operate at high speed at a high voltage. In this regard, the propagation delay indicates a time taken to input the driving signal CON that turns a corresponding transistor on to a gate of the transistor and to output a saturated voltage signal to a source end or a drain end that is an output end of the transistor. If the power switching amplifier uses the gallium nitride GaN transistor or the gallium arsenide GaAs transistor as the switching device that performs the switching amplifying operation, the power switching amplifier may perform a switching operation at high speed.
Accordingly, switching noise may be minimized, thereby reducing an SNR of the audio signal processing apparatus Furthermore, a signal may be quickly amplified at a high voltage, thereby increasing a maximum output of the audio signal processing apparatus The gallium nitride GaN transistor used as the switching device may be a hetero junction field effect transistor HFET. The detailed construction of the power switching amplifier will be described with reference to FIG.
Related Look-Ahead Based Sigma-Delta Modulation (Analog Circuits and Signal Processing)
Copyright 2019 - All Right Reserved